Semiconductor microprocessors and large scale integrated circuits are manufactured by integrating elements such as a metal-oxide-semiconductor (MOS) field effect transistor (FET) on a semiconductor substrate. Complementary MOSFETs (CMOS) are generally basic elements (switch elements) of such integrated circuits. As the material for semiconductor substrates, silicon which is a group IV semiconductor is mainly used. The integration density and performance of semiconductor microprocessors and large scale integrated circuits can be improved by reducing the size of transistors making up a CMOS. One of problems accompanied by reduction of the size of the CMOS is an increase of power consumption. An increase in the number of CMOSs that can be mounted on one microchip and an increase of leakage current caused by a short channel effect are main factors of the increase of power consumption. Among them, the increase of leakage current leads to an increase of a supply voltage. In view of this, it is necessary to suppress the leakage current and reduce the driving voltage for each CMOS.
As an index of a switching performance of a CMOS, a subthreshold coefficient (mV/decade) is used. The subthreshold coefficient corresponds to a minimum drive voltage to turn the MOSFET into an ON state. The switch characteristic of the conventional MOSFET is based on a diffusion phenomenon of electrons and holes (carriers). Therefore, with the conventional MOSFET, the theoretical minimum value of the subthreshold coefficient is 60 mV/decade, and it is not possible to realize a switching performance with a subthreshold coefficient smaller than that value.
A tunnel-field-effect transistor (TFET) is reported as a switch element that operates at a smaller subthreshold coefficient beyond the above-mentioned physical theoretical limitation. Since the tunnel-field-effect transistor does not cause the short channel effect and can realize a high ON/OFF ratio with a low voltage, the tunnel-field-effect transistor is considered to be a promising next-generation switch element. In recent years, a tunnel-field-effect transistor using a group III-V compound semiconductor nanowire is reported (see, for example, see Non-PTL 1).
Non-PTL 1 discloses a tunnel-field-effect transistor including a p-type silicon (111) substrate, an InAs nanowire disposed on the (111) surface of the silicon substrate perpendicular to the substrate surface, a source electrode connected with the silicon substrate, a drain electrode connected with the InAs nanowire, and a gate electrode disposed at a position where the interface between the silicon substrate and the InAs nanowire can be affected. It is reported that this tunnel-field-effect transistor can be operated with a small subthreshold coefficient (60 mV/decade or smaller).